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PHB100N03LT
N-channel enhancement mode field-effect transistor
Rev. 01 -- 07 September 2000
M3D166
Product specification
1. Description
N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOSTM1 technology. Product availability: PHB100N03LT in SOT404 (D2-PAK).
2. Features
s s s s s TrenchMOSTM technology Low on-state resistance Avalanche ruggedness rated Logic level compatible Surface mount package.
3. Applications
c c
s DC to DC converters s Synchronous rectification.
4. Pinning information
Table 1: Pin 1 2 3 mb Pinning - SOT404, simplified outline and symbol Description gate (g)
mb
Simplified outline
Symbol
d
drain (d) source (s) connected to drain (d)
[1]
g
2 1 3
MBK116
MBB076
s
SOT404 (D2-PAK)
[1] 1. It is not possible to make connection to pin 2 of the SOT404 package. TrenchMOS is a trademark of Royal Philips Electronics.
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tj = 25 to 175 C Tmb = 25 C; VGS = 5 V Tmb = 25 C VGS = 10 V; ID = 25 A VGS = 5 V; ID = 25 A Typ - - - - 5.0 6.2 Max 25 75 125 175 5.8 7.5 Unit V A W C m m drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Symbol Parameter
6. Limiting values
Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS VGSM ID drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) peak gate-source voltage drain current (DC) tp 50 s; pulsed; duty cycle = 25% Tmb = 25 C; VGS = 5 V; Figure 2 and 3 Tmb = 100 C; VGS = 5 V; Figure 2 IDM Ptot Tstg Tj IS ISM EAS peak drain current total power dissipation storage temperature operating junction temperature source (diode forward) current (DC) peak source (diode forward) current non-repetitive avalanche energy Tmb = 25 C Tmb = 25 C; pulsed; tp 10 s unclamped inductive load; ID = 75 A; tp = 0.2 ms; VDD 15 V; RGS = 50 ; VGS = 5 V; starting Tj = 25 C; Figure 4 unclamped inductive load; VDD 15 V; RGS = 50 ; VGS = 5 V; Figure 4 Tmb = 25 C; pulsed; tp 10 s; Figure 3 Tmb = 25 C; Figure 1 Conditions Tj = 25 to 175 C Tj = 25 to 175 C; RGS = 20 k Min - - - - - - - - -55 -55 - - - Max 25 25 15 20 75 67 240 125 +175 +175 75 240 240 Unit V V V V A A A W C C A A mJ
Source-drain diode
Avalanche ruggedness
IAS
non-repetitive avalanche current
-
75
A
9397 750 07309
(c) Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 -- 07 September 2000
2 of 13
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
120 Pder
(%)
03aa16
Ider (%)
120 100 80 60 40 20 0
03ac83
100
80
60
40
20
0 0 25 50 75 100 125 150 175 200
Tmb (oC)
0
25
50
75
100 125 150 175 200 Tmb (oC)
P tot P der = ---------------------- x 100% P
tot ( 25 C )
VGS 5 V ID I der = ------------------ x 100% I
D ( 25 C )
Fig 1. Normalized total power dissipation as a function of mounting base temperature.
Fig 2. Normalized continuous drain current as a function of mounting base temperature.
102 IAS (A)
03ab29
103 ID (A) 102 D.C. 10
P
03ab18
25oC
RDSon = VDS/ ID
tp = 10 s 100 s 1 ms 10 ms 100 ms
10
Tj prior to avalanche = 150oC
=
tp T
tp
t T
1
10-1
1
10
VDS (V) 102
1 10-3
10-2
10-1
1
tp (ms)
10
Tmb = 25 C; IDM is single pulse.
Unclamped inductive load; VDD 15 V; RGS = 50 ; VGS = 5 V; starting Tj = 25 C and 150C.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
Fig 4. Non-repetitive avalanche ruggedness current as a function of pulse duration.
9397 750 07309
(c) Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 -- 07 September 2000
3 of 13
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
7. Thermal characteristics
Table 4: Symbol Rth(j-mb) Rth(j-a) Thermal characteristics Parameter Conditions Value 1.2 50 Unit K/W K/W thermal resistance from junction to mounting Figure 5 base thermal resistance from junction to ambient mounted on a printed circuit board; minimum footprint
7.1 Transient thermal impedance
03ab19
10 Zth(j-mb) K/W 1 = 0.5 0.2 10-1 0.1 0.05 0.02 10-2 single pulse 10-3 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1
tp T t P
=
tp T
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 07309
(c) Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 -- 07 September 2000
4 of 13
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
8. Characteristics
Table 5: Characteristics Tj = 25 C unless otherwise specified Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 250 A; VGS = 0 V Tj = 25 C Tj = -55 C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 10 Tj = 25 C Tj = 175 C Tj = -55 C IDSS drain-source leakage current VDS = 25 V; VGS = 0 V Tj = 25 C Tj = 175 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 10 V; VDS = 0 V VGS = 10 V; ID = 25 A; Figure 8 and 9 Tj = 25 C VGS = 5 V; ID = 25 A; Figure 8 and 9 Tj = 25 C Tj = 175 C Dynamic characteristics gfs Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf VSD trr Qr forward transconductance total gate charge gate-source charge gate-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time turn-off rise time turn-off delay time turn-off fall time source-drain (diode forward) voltage reverse recovery time recovered charge IS = 25 A; VGS = 0 V; Figure 14 IS = 25 A; dIS/dt = -100 A/s; VGS = 0 V; VDS = 25 V VDD = 15 V; RD = 0.6 ; VGS = 5 V; RG = 10 VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 13 VDS = 25 V; ID = 25 A; Figure 12 ID = 75 A; VDS = 15 V; VGS = 5 V; Figure 15 - - - - - - - - - - - - - - 68 60 8 32 3500 970 640 21 170 270 216 0.95 140 270 - - - - - - - - - - - 1.2 - - S nC nC nC pF pF pF ns ns ns ns V ns nC - - 6.2 - 7.5 14 m m - 5 5.8 m - - - 0.05 5.0 10 10 500 100 A A nA 1 0.5 - 1.5 - - 2 - 2.3 V V V 25 23 35 - - - V V Min Typ Max Unit Static characteristics
Source-drain diode
9397 750 07309
(c) Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 -- 07 September 2000
5 of 13
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
03ab20
50 ID (A) 45 40 35 30 25 20 15 10 5 0 0
03ab22
10V 5V
3V
50 VGS = 2.8 V 2.6 V ID 45 (A) 40 35 Tj = 25 C 2.4 V 25 20 2.2 V 2V 15 10 5 0 175oC Tj = 25oC 30 VDS > ID X RDSon
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8 VDS (V)
2
0
0.5
1
1.5
2
2.5 VGS (V)
3
Tj = 25 C
Tj = 25 C and 175 C; VDS > ID x RDSon
Fig 6. Output characteristics: drain current as a function of drain-source voltage; typical values.
0.03 RDSon () 0.025
03ab21
Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values.
03aa27
2.2 V
2.4 V 2.6 V
2.0
a
1.8 1.6 1.4
0.02
1.2
0.015 2.8 V 3V 0.01 5V
1.0 0.8 0.6 0.4
0.005 Tj = 25oC 0 0 5 10 15 20 25 30 35 40 45 ID (A) 50 VGS = 10V
0.2 0 -60
-20
20
60
100
140
Tj (oC)
180
Tj = 25 C
R DSon a = --------------------------R DSon ( 25 C )
Fig 8. Drain-source on-state resistance as a function of drain current; typical values.
Fig 9. Normalized drain-source on-state resistance factor as a function of junction temperature.
9397 750 07309
(c) Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 -- 07 September 2000
6 of 13
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
2.5
V GS(th) (V) max
03aa33
10-1
ID (A) 10-2
03aa36
2
typ
1.5
min
10-3
min
typ
max
1
10-4
0.5
10-5
0 -60 -20 20 60 100 140 180 Tj (oC)
10-6
0 0.5 1 1.5 2 2.5
VGS (V)
3
ID = 1 mA; VDS = VGS
Tj = 25 C; VDS = 5 V
Fig 10. Gate-source threshold voltage as a function of junction temperature.
03ab23
Fig 11. Sub-threshold drain current as a function of gate-source voltage.
03ab24
80 gfs 75 (S) 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 0
VDS > ID X RDSon
Tj = 25oC
104 Ciss, Coss, Crss (pF)
175oC
Ciss
103
Coss
Crss
5
10
15
20
25
30
35
40
45 ID (A)
50
102 10-1 1 10 VDS (V) 102
Tj = 25 C and 175 C; VDS > ID x RDSon
VGS = 0 V; f = 1 MHz
Fig 12. Forward transconductance as a function of drain current; typical values.
Fig 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.
9397 750 07309
(c) Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 -- 07 September 2000
7 of 13
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
03ab26
03ab25
50 IS 45 (A) 40 35 30 25 20 15 10 5 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 VSD (V) 175oC Tj = 25oC VGS = 0 V
15 VGS 14 (V) 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0
ID = 75 A VDS = 15 V Tj = 25oC
10 20 30 40 50 60 70 80 90 100 110 QG (nC)
Tj = 25 C and 175 C; VGS = 0 V
ID = 75 A; VDS = 15 V
Fig 14. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values.
Fig 15. Gate-source voltage as a function of gate charge; typical values.
9397 750 07309
(c) Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 -- 07 September 2000
8 of 13
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
9. Package outline
Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads (one lead cropped) SOT404
A E A1 mounting base
D1
D
HD
2
Lp
1
3
b c Q
e
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 4.50 4.10 A1 1.40 1.27 b 0.85 0.60 c 0.64 0.46 D max. 11 D1 1.60 1.20 E 10.30 9.70 e 2.54 Lp 2.90 2.10 HD 15.40 14.80 Q 2.60 2.20
OUTLINE VERSION SOT404
REFERENCES IEC JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 98-12-14 99-06-25
Fig 16. SO404 (D2-PAK).
9397 750 07309 (c) Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 -- 07 September 2000
9 of 13
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
10. Revision history
Table 6: 01 Revision history CPCN Description Product specification; initial version.
Rev Date 20000907
9397 750 07309
(c) Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 -- 07 September 2000
10 of 13
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
11. Data sheet status
Datasheet status Objective specification Preliminary specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Product specification
Production
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
12. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
13. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
9397 750 07309
(c) Philips Electronics N.V. 2000 All rights reserved.
Product specification
Rev. 01 -- 07 September 2000
11 of 13
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
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(SCA70)
9397 750 07309
(c) Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 -- 07 September 2000
12 of 13
Philips Semiconductors
PHB100N03LT
N-channel enhancement mode field-effect transistor
Contents
1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
(c) Philips Electronics N.V. 2000.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 07 September 2000 Document order number: 9397 750 07309

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